MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'
authorMaciej W. Rozycki <macro@linux-mips.org>
Wed, 27 May 2015 13:15:15 +0000 (14:15 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Sun, 21 Jun 2015 19:52:41 +0000 (21:52 +0200)
commit3bcb03f3a7160e411c5f335028a5c70b32f0edb7
tree74abe01f8ee04361686a6e1c9330858868849f6c
parentdbfbf60f4a6b058b873b0d37e272fc3bd2f1356d
MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'

Move the initialisation of the CP0.Wired register implemented by Toshiba
TX3922 and TX3927 processors from `tx39_cache_init' to `tlb_init' where
it belongs, correcting code structure and making sure initialisation
does not rely on `tx39_cache_init' being called before `tlb_init' to
work correctly.

Make `r3k_have_wired_reg' static as it's no longer externally referred
to; remove a stale declaration too.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10195/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/lib/r3k_dump_tlb.c
arch/mips/mm/c-tx39.c
arch/mips/mm/tlb-r3k.c