ASoC: TWL4030: Correct the ARXR2_APGA_CTL chip default
authorPeter Ujfalusi <peter.ujfalusi@nokia.com>
Wed, 26 May 2010 08:38:19 +0000 (11:38 +0300)
committerLiam Girdwood <lrg@slimlogic.co.uk>
Mon, 31 May 2010 10:08:58 +0000 (11:08 +0100)
commit3c36cc688e7ad4ab595a0ac59697e4e1d06338c5
tree622be36180386dbad7f19f169cf279249a19c427
parent9fdcc0f72af8801d8429a465a159d815774dbf6d
ASoC: TWL4030: Correct the ARXR2_APGA_CTL chip default

It seams at least on twl5031 that the ARXR2_APGA_CTL register
does not have the same default value as it is written in
the TRM.
Since the codec part of the PM chip has not been actually
changed according to TI, assuming, that all version has
the same problem, so writing there the TRM value.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
sound/soc/codecs/twl4030.c