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[mips][microMIPSr6] Implement SUB and SUBU instructions
authorZoran Jovanovic <zoran.jovanovic@imgtec.com>
Wed, 29 Apr 2015 16:22:46 +0000 (16:22 +0000)
committerZoran Jovanovic <zoran.jovanovic@imgtec.com>
Wed, 29 Apr 2015 16:22:46 +0000 (16:22 +0000)
commit3cf9e970d3ffaf8b591a7c2783769af8e2fe83fe
tree149656214c703dbf8906b4101d0e8b64cd99afcdtree | snapshot
parentb26cc705b0ef3540c4deaaa497c8519cdf66e408commit | diff
[mips][microMIPSr6] Implement SUB and SUBU instructions
Differential Revision: http://reviews.llvm.org/D8764

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236118 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MicroMips32r6InstrInfo.td diff | blob | history
test/MC/Disassembler/Mips/micromips32r6.txt diff | blob | history
test/MC/Mips/micromips32r6/valid.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors