clk: sunxi: Add apb0 gates for H3
authorKrzysztof Adamski <k@japko.eu>
Mon, 22 Feb 2016 13:03:25 +0000 (14:03 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 3 May 2017 04:19:47 +0000 (21:19 -0700)
commit40a55e4f9401499ecf0d9f9076ba06f48822d1aa
treeee4ad8257c89d06c9674cf4f271196fadcc1563a
parent531be60fc5804318989061178fe8a34eff561e03
clk: sunxi: Add apb0 gates for H3

commit 6e17b4181603d183d20c73f4535529ddf2a2a020 upstream.

This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).

Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.

Signed-off-by: Krzysztof Adamski <k@japko.eu>
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
         the commit log a bit]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/clock/sunxi.txt
drivers/clk/sunxi/clk-simple-gates.c