Don't cache the instruction and register info from the TargetMachine, because
authorBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 07:04:14 +0000 (07:04 +0000)
committerBill Wendling <isanbard@gmail.com>
Fri, 7 Jun 2013 07:04:14 +0000 (07:04 +0000)
commit41e632d9e1a55d36cb08b0551ad82a13d9137a5e
tree52d4b47f777e9928012d6028eefa27bedf9f4a12
parented8b5b55a4416286758c5567c2602d2c7d0be585
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183493 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Mips16InstrInfo.cpp
lib/Target/Mips/Mips16RegisterInfo.cpp
lib/Target/Mips/Mips16RegisterInfo.h
lib/Target/Mips/MipsCodeEmitter.cpp
lib/Target/Mips/MipsConstantIslandPass.cpp
lib/Target/Mips/MipsDelaySlotFiller.cpp
lib/Target/Mips/MipsLongBranch.cpp
lib/Target/Mips/MipsSEFrameLowering.cpp
lib/Target/Mips/MipsSEInstrInfo.cpp
lib/Target/Mips/MipsSERegisterInfo.cpp
lib/Target/Mips/MipsSERegisterInfo.h