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[AArch64] Fix FP16 vector instructions that should only accept low registers
authorOliver Stannard <oliver.stannard@arm.com>
Wed, 9 Dec 2015 14:32:11 +0000 (14:32 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Wed, 9 Dec 2015 14:32:11 +0000 (14:32 +0000)
commit43ecf2d4d1d9c89b0a7519708bfce9c728d51f08
tree97aa536c59c88361feed2fb8634c4b2615ce4484tree | snapshot
parent43638210b855f841f309d35c48fc1dad8ba9f4b1commit | diff
[AArch64] Fix FP16 vector instructions that should only accept low registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255113 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64InstrFormats.td diff | blob | history
test/MC/AArch64/fullfp16-diagnostics.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors