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ARM: vexpress/TC2: Match mainline cache disabling sequence in tc2_pm_down
authorJon Medhurst <tixy@linaro.org>
Mon, 2 Dec 2013 11:47:16 +0000 (11:47 +0000)
committerJon Medhurst <tixy@linaro.org>
Mon, 2 Dec 2013 12:54:16 +0000 (12:54 +0000)
commit493c65aab4cfbdec1b065d409fd8b2c9b907d8ec
tree1f4dd1703e51c4beed66eac5fbceac00b37f9580tree | snapshot
parent4bb2d496b52029fc12322af09f1a5dda95affdbacommit | diff
ARM: vexpress/TC2: Match mainline cache disabling sequence in tc2_pm_down

When the TC2 pm code was finally upstreamed [1] the cache disbling sequence
had been modified to avoid some potential race conditions. So lets backport
these changes.

[1] Commit 11b277eabe70 ARM: vexpress/TC2: basic PM support

Signed-off-by: Jon Medhurst <tixy@linaro.org>
arch/arm/mach-vexpress/tc2_pm.c diff | blob | history
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