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(parent: 9d6567c) | patch
sparc64: Fix Niagara2 perf event handling.
authorDavid S. Miller <davem@davemloft.net>
Tue, 5 Jan 2010 07:16:03 +0000 (23:16 -0800)
committerGreg Kroah-Hartman <gregkh@suse.de>
Fri, 22 Jan 2010 23:18:33 +0000 (15:18 -0800)
commit4bff5fff57875872c813022bfa3a523b88196c98
treefdc6fd8fefe84ab6de0e4651bfe37b28712417f5tree | snapshot
parent9d6567c5369d439440ad96e8b402919d4480e2c6commit | diff
sparc64: Fix Niagara2 perf event handling.

[ Upstream commit e04ed38d4e0cd32141f723560efcc8252b0241e2 ]

For chips like Niagara2 that have true overflow indications
in the %pcr (which we don't actually need and don't use)
the interrupt signal persists until the overflow bits are
cleared by an explicit %pcr write.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/sparc/kernel/perf_event.c diff | blob | history
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