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(parent: d31c549) | patch
Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers....
authorEvan Cheng <evan.cheng@apple.com>
Thu, 6 May 2010 01:52:03 +0000 (01:52 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Thu, 6 May 2010 01:52:03 +0000 (01:52 +0000)
commit4ffc22ae000f207d3c660ebc197d31940025fbfa
tree24c9b36d88d76fcf2a4cdfdaf758775ca2b6c8a8tree | snapshot
parentd31c5496d7e1580058b5c6fbc8fd537a641ea590commit | diff
Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103156 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
lib/Target/ARM/ARMBaseRegisterInfo.cpp diff | blob | history
lib/Target/ARM/ARMInstrNEON.td diff | blob | history
lib/Target/ARM/ARMRegisterInfo.h diff | blob | history
lib/Target/ARM/ARMRegisterInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors