Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
authorLang Hames <lhames@gmail.com>
Tue, 8 Nov 2011 18:56:23 +0000 (18:56 +0000)
committerLang Hames <lhames@gmail.com>
Tue, 8 Nov 2011 18:56:23 +0000 (18:56 +0000)
commit5207bf2177e9ef1e68d9408ea4b44f1c8a5ef9c0
treec94405cc8244718db4821d7662e9479180b3d0ed
parentd752e0f7e64585839cb3a458ef52456eaebbea3c
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.

Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/ARM/2011-10-26-memset-inline.ll