drm/i915/chv: Add CHV HW status to SSEU status
authorJeff McGee <jeff.mcgee@intel.com>
Fri, 27 Feb 2015 18:22:32 +0000 (10:22 -0800)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:05 +0000 (22:30 +0100)
commit5575f03a603d267e84ab3727f7241b8be5f7d8ee
tree14c210ab79a2ed297f992f660a79bd2dd02fb829
parentc93043ae1deaa0f9bd394ac2d8c6881deb19b53a
drm/i915/chv: Add CHV HW status to SSEU status

Collect the currently enabled counts of slice, subslice, and
execution units using the power gate control ack message
registers specific to Cherryview.

Slice/subslice/EU info and hardware status can now be
determined for CHV, so allow the debugfs SSEU status dump
to proceed for CHV devices.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_reg.h