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amd64_edac: Fix DCT base address selector
authorBorislav Petkov <borislav.petkov@amd.com>
Mon, 8 Mar 2010 17:29:35 +0000 (18:29 +0100)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 10 Aug 2010 17:20:38 +0000 (10:20 -0700)
commit568590d41c7a89fa30874cffcd0ba658ed6e01bc
treeb9cbb8f47bbbc2e98f44b062359a48a2991f7603tree | snapshot
parentfcd6ae1e01e0740ad84bc9440edd217ef6c791aacommit | diff
amd64_edac: Fix DCT base address selector

commit 9975a5f22a4fcc8d08035c65439900a983f891ad upstream.

The correct check is to verify whether in high range we're below 4GB
and not to extract the DctSelBaseAddr again. See "2.8.5 Routing DRAM
Requests" in the F10h BKDG.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/edac/amd64_edac.c diff | blob | history
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