rk29: L2 Data RAM latency set to 9 cycles
author黄涛 <huangtao@rock-chips.com>
Tue, 22 Feb 2011 10:16:26 +0000 (18:16 +0800)
committer黄涛 <huangtao@rock-chips.com>
Tue, 22 Feb 2011 10:16:56 +0000 (18:16 +0800)
commit5854697912d5590da8a32c98c38483033af6dd45
treecfb22878e499a36092bd6d3bd7f18944c7104ecd
parent005c8d358182f0c5feb4efb03bb6a641b37cfbe6
rk29: L2 Data RAM latency set to 9 cycles
arch/arm/mm/proc-v7.S