support ddr resume after CPU power down
authorhcy <hcy@rock-chips.com>
Tue, 8 Apr 2014 02:03:42 +0000 (10:03 +0800)
committerhcy <hcy@rock-chips.com>
Tue, 8 Apr 2014 02:03:42 +0000 (10:03 +0800)
commit5afe42ae1071451ca57185802bc9d50d3bc06d95
treebda6708887b5b4a2b8e4d0dc07633899353888f9
parent519dd69f1cf11c9cd229b55fd5fe1ffffa1c0ef0
support ddr resume after CPU power down
arch/arm/mach-rockchip/ddr_reg_resume.inc
arch/arm/mach-rockchip/ddr_rk32.c