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rk29: L2 Data RAM latency set to 4 cycles, Tag RAM latency set to 3 cycles, suggested...
author黄涛 <huangtao@rock-chips.com>
Mon, 11 Jul 2011 12:26:15 +0000 (20:26 +0800)
committer黄涛 <huangtao@rock-chips.com>
Mon, 11 Jul 2011 12:28:10 +0000 (20:28 +0800)
commit5ed7eccb31a748046dfa4bbe1d06571285d6b510
tree2257d0e2f2b59464190376ececff60029312e65etree | snapshot
parentae71eb278d1608fe5ab0ba8b0709d6dae2708a3ecommit | diff
rk29: L2 Data RAM latency set to 4 cycles, Tag RAM latency set to 3 cycles, suggested by zcs
arch/arm/mm/proc-v7.S diff | blob | history
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