clk: st: Support for QUADFS inside ClockGenB/C/D/E/F
authorGabriel FERNANDEZ <gabriel.fernandez@st.com>
Thu, 27 Feb 2014 15:24:17 +0000 (16:24 +0100)
committerMike Turquette <mturquette@linaro.org>
Tue, 25 Mar 2014 22:59:09 +0000 (15:59 -0700)
commit5f7aa9071e935c8c0e869306c7ef073df6c409f6
treefa387206ddf1dd11bfedf9c03aeba2944d4d75b8
parent44993d384004fa9ca2dfcca86cddc436a28d6958
clk: st: Support for QUADFS inside ClockGenB/C/D/E/F

The patch supports the 216/432/660 type Quad Frequency Synthesizers
used by ClockGenB/C/D/E/F

QUADFS clock : It includes support for all 216/432/660 type Quad
Frequency Synthesizers : implemented as Fixed Parent / Rate / Gate clock,
with clock rate calculated reading H/w settings done at BOOT.

QuadFS have 4 outputs : chan0 chan1 chan2 chan3

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/st/Makefile
drivers/clk/st/clkgen-fsyn.c [new file with mode: 0644]