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(parent: 91383a3) | patch
[X86][SSE2] Just use an explicit SSE2 target attribute - not a cpu type.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 5 Jul 2015 19:03:51 +0000 (19:03 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 5 Jul 2015 19:03:51 +0000 (19:03 +0000)
commit5fd4fe08f6f5126edfb23c5c84aa90ec22281761
treeae86f8407aeb950f4b86c0b1499d8fff467dfa77tree | snapshot
parent91383a36daa2bb1c5647f4f92e87dac2ec388331commit | diff
[X86][SSE2] Just use an explicit SSE2 target attribute - not a cpu type.

corei7 is capable of a lot more than just SSE2....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241409 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/sse2-vector-shifts.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors