UPSTREAM: clocksource/drivers/rockchip: Add support for the rk3399 SoC
authorHuang, Tao <huangtao@rock-chips.com>
Thu, 16 Jun 2016 14:00:08 +0000 (16:00 +0200)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 22 Jun 2016 11:55:45 +0000 (19:55 +0800)
commit63e5c8e831acfcbcc3a6fa97b2a1b99667a366ed
tree5150929928217478cfa32d25af5a03ac6374c05f
parent37a084a635faaf9e0efc83f2ee6807d9453e29be
UPSTREAM: clocksource/drivers/rockchip: Add support for the rk3399 SoC

The only difference between the rk3399 SoC and the other ones is the control
register offset which is different.

Add a new field to store the control register address depending on the SoC
and use it instead of the <base> + <control offset>.

BUG=chrome-os-partner:54522
TEST=Tested on gru, cat /proc/interrupts |grep timer

Change-Id: I37f4d30a8b4609887b175ab7e9b1117b2ac436e4
Signed-off-by: Huang Tao <huangtao@rock-chips.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Tested-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
(cherry picked from git.linaro.org/people/daniel.lezcano/linux.git clockevents/next
 commit d0e2b96b2f723cb2d3ca992eaa2fe643367830f8)
Reviewed-on: https://chromium-review.googlesource.com/353977
Reviewed-by: Douglas Anderson <dianders@chromium.org>
drivers/clocksource/rockchip_timer.c