i2c-tegra: add support for virtual busses with dynamic pinmuxing
this adds support for dynamically reprogramming the I2C controller's
pin mux on transaction boundaries to enable one controller to be
registered as multiple I2C bus adapters with the kernel. this allows
platform designers an additional tool to resolve clock rate, I/O
voltage and electrical loading restrictions between the platform's
peripherals.
the i2c-tegra platform data is extended to support this; platforms
which use this feature should pass in the number of busses which
should be created for each controller, the starting adapter number
to use and the clock rate and pin mux for each virtual bus.
Change-Id: I57a96deb7b7b793222ec3f8cc3a941917a023609
Signed-off-by: Gary King <gking@nvidia.com>