AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions
authorTom Stellard <thomas.stellard@amd.com>
Tue, 15 Dec 2015 20:55:55 +0000 (20:55 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Tue, 15 Dec 2015 20:55:55 +0000 (20:55 +0000)
commit6a0d02e088584bb29783924347a5de31aeb06f3d
tree95871efedc298d071b2ea3e7ec8f5c70bf0510b6
parent022b1097ba62ef2808176c1d834c326e7eb98cba
AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions

Summary:
We were previously selecting all constant loads to SMRD instructions and legalizing
the SMRDs with non-uniform addresses during the SIFixSGPRCopesPass.

This new solution is more simple and also generates much better code, because
the instruction selector is able to take advantage of all the MUBUF addressing
modes that are legalization pass wasn't able to.

We also no longer need to generate v_add_* instructions when we
have a uniform pointer and a non-uniform offset, as this is now folded into the
MUBUF instruction during instruction selection.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255672 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp [new file with mode: 0644]
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
lib/Target/AMDGPU/CMakeLists.txt
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIISelLowering.h
lib/Target/AMDGPU/SIInstrInfo.td
lib/Target/AMDGPU/SIInstructions.td
test/CodeGen/AMDGPU/salu-to-valu.ll