drm/i915: gen specific ring init
authorBen Widawsky <benjamin.widawsky@intel.com>
Mon, 30 Jun 2014 16:53:36 +0000 (09:53 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 7 Jul 2014 20:08:29 +0000 (22:08 +0200)
commit707d9cf9935cfba2d62dd80dc01dc5dc4530d4ca
tree12d18ab0f767467e6b4b2ffdd9bde43fe79093e7
parentddd4dbc6c16e4719841447348e6b5ec3541c8f68
drm/i915: gen specific ring init

Gen8 has already had some differentiation with how it handles rings.
Semaphores bring yet more differences, and now is as good a time as any
to do the split.

Also, since gen8 doesn't actually use semaphores up until this point,
put the proper "NULL" values in for the mbox info.

v2: v1 had a stale commit message

v3: Move everything in the is_semaphore_enabled() check

v4: VCS2 rebase
Remove double assignment of signal in render ring (Ville)

v5: Adding missed VCS2 signal init on gen8+ (Rodrigo)

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ringbuffer.c