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(parent: 6cded23) | patch
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
authorBob Wilson <bob.wilson@apple.com>
Wed, 29 Sep 2010 17:54:10 +0000 (17:54 +0000)
committerBob Wilson <bob.wilson@apple.com>
Wed, 29 Sep 2010 17:54:10 +0000 (17:54 +0000)
commit7122ba7efb5430d724ed3a0ac86fa7f7185b43ba
tree221bcb00ba6237d7faba0d6bd836515b6782b2cdtree | snapshot
parent6cded231a3a748e4fb1339891c81d385058e571fcommit | diff
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMLoadStoreOptimizer.cpp diff | blob | history
lib/Target/ARM/ARMSubtarget.h diff | blob | history
test/CodeGen/ARM/align.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors