clk: rockchip: support setting ddr clock via SIP Version 2 APIs
authorTang Yun ping <typ@rock-chips.com>
Thu, 4 May 2017 12:49:58 +0000 (20:49 +0800)
committerTang Yun ping <typ@rock-chips.com>
Wed, 10 May 2017 08:17:22 +0000 (16:17 +0800)
commit764e893ee82321938fc6f4349e9e7caf06a04410
treea559d2c0a88ad9dd5e9a1b99dcebc2d7f0f3de07
parent40204ab0fd0f397434a0387efe089abcbd9743f9
clk: rockchip: support setting ddr clock via SIP Version 2 APIs

1. Add support setting ddr clock via SIP Version 2 APIs
2. RK3288 using SIP Vision 2.

Change-Id: I935e43b1885a96650dc86e3eb6d79de6795062a9
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
drivers/clk/rockchip/clk-ddr.c
drivers/clk/rockchip/clk-rk3288.c
drivers/clk/rockchip/clk.h