mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver
authorFeng Kan <fkan@amcc.com>
Tue, 25 Aug 2009 18:27:20 +0000 (11:27 -0700)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Sat, 19 Sep 2009 21:15:00 +0000 (14:15 -0700)
commit76c23c32e3b3ad48e07e07897075ab19ae1ef117
tree0ed6a6b459b116b6dc06cf5f6725b65826cad97e
parentebd5a74db74ee2db833d43ea35108a4be9cab42f
mtd: nand: fix ECC Correction bug for SMC ordering for NDFC driver

Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the b1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
byte_addr = (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Cc: stable@kernel.org
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
drivers/mtd/nand/ndfc.c