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(parent: 8b6a26c) | patch
R600/SI: Fix bad code with unaligned byte vector loads
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 14 Jan 2015 01:35:22 +0000 (01:35 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 14 Jan 2015 01:35:22 +0000 (01:35 +0000)
commit781f7ee502fa04228e1033aea5612aa42b73cc88
treedb54aab96b6e6b8843efb7245821b8c390a10555tree | snapshot
parent8b6a26ca8581be4cd90148e8631bd6d808ddabe6commit | diff
R600/SI: Fix bad code with unaligned byte vector loads

Don't do the v4i8 -> v4f32 combine if the load will need to
be expanded due to alignment. This stops adding instructions
to repack into a single register that the v_cvt_ubyteN_f32
instructions read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225926 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/SIISelLowering.cpp diff | blob | history
lib/Target/R600/SIISelLowering.h diff | blob | history
test/CodeGen/R600/cvt_f32_ubyte.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors