drm/i915: rewrite the LCPLL code
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 5 Oct 2012 15:05:52 +0000 (12:05 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 10 Oct 2012 13:47:39 +0000 (15:47 +0200)
commit79f689aa6b14e058d4effd734e9920ed9531401d
treee57cb4d58072314f5d7b4fe0bd97aacf41abf50e
parentbcb450861653167c4fec10be3d916299c34bb1d8
drm/i915: rewrite the LCPLL code

Right now, we're trying to enable LCPLL at every mode set, but we're
never disabling it. Also, we really don't want to be disabling LCPLL
since it requires a very complex disable/enable sequence. This
register should really be set by the BIOS and we shouldn't be touching
it. Still, let's try to check its value and print some errors in case
we find something wrong. We're also adding intel_ddi_get_cdclk_freq
which will be used later in other places.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h