Allow targets which produce setcc results in non-MVT::i1 registers to describe
authorChris Lattner <sabre@nondot.org>
Thu, 7 Apr 2005 19:41:18 +0000 (19:41 +0000)
committerChris Lattner <sabre@nondot.org>
Thu, 7 Apr 2005 19:41:18 +0000 (19:41 +0000)
commit7b5987d56e194cea0364433a838abc2d6844e047
treef647c7065effd40e4a094983e39696149307b158
parent2467392c5931579e2354b9e64e8ecf6cc5192d13
Allow targets which produce setcc results in non-MVT::i1 registers to describe
what the contents of the top bits of these registers are, in the common cases
of targets that sign and zero extend the results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21145 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetLowering.h