staging: rtl8723au: Eliminate HW_VAR_RESP_SIFS
authorJes Sorensen <Jes.Sorensen@redhat.com>
Wed, 9 Apr 2014 21:20:25 +0000 (23:20 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 14 Apr 2014 15:29:02 +0000 (08:29 -0700)
commit7b7aefaab13773c3f54ddc492df04872f8d60d36
tree77807fa01c6816bc604a4c8ca4643666fed10bf8
parent04c3842773aff89c3c0bce54d982c07513b4a24d
staging: rtl8723au: Eliminate HW_VAR_RESP_SIFS

Yet another case of an endian bug from treating a 32 bit integer as an
array of 8 bit numbers...

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723au/core/rtw_wlan_util.c
drivers/staging/rtl8723au/hal/rtl8723a_hal_init.c
drivers/staging/rtl8723au/include/hal_intf.h