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(parent: a3defb0) | patch
Order register classes topologically.
authorJakob Stoklund Olesen <stoklund@2pi.dk>
Fri, 30 Sep 2011 00:10:36 +0000 (00:10 +0000)
committerJakob Stoklund Olesen <stoklund@2pi.dk>
Fri, 30 Sep 2011 00:10:36 +0000 (00:10 +0000)
commit7dcaa5b0fb56468e774044d3b887c21b2d484a1c
tree59c87b407ef324e583cdebcfde97420f657564c1tree | snapshot
parenta3defb07a075e936c435428d5adeedc5f12f5ab5commit | diff
Order register classes topologically.

All register classes are given a lower ID than their sub-classes.
Cliques are ordered alphabetically.

This will be used to simplify some sub-class operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140826 91177308-0d34-0410-b5e6-96231b3b80d8
utils/TableGen/CodeGenRegisters.cpp diff | blob | history
utils/TableGen/CodeGenRegisters.h diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors