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(parent: e94e668) | patch
C6X: clocks
authorMark Salter <msalter@redhat.com>
Tue, 4 Oct 2011 15:10:50 +0000 (11:10 -0400)
committerMark Salter <msalter@redhat.com>
Thu, 6 Oct 2011 23:48:07 +0000 (19:48 -0400)
commit81ec98898188639ac53413605681b3e3bb0a2ff1
treeba8a4c16120f0e9c2fd2fe5c9e5f7acc0a56e652tree | snapshot
parente94e668251ab31b17ef6dcd16ba7fe05ffc1917acommit | diff
C6X: clocks

The C6X SoCs contain several PLL controllers each with up to 16 clock outputs
feeding into the cores or peripheral clock domains. The hardware is very similar
to arm/mach-davinci clocks. This is still a work in progress which needs to be
updated once device tree clock binding changes shake out.

Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
arch/c6x/include/asm/clkdev.h [new file with mode: 0644] blob
arch/c6x/include/asm/clock.h [new file with mode: 0644] blob
arch/c6x/platforms/pll.c [new file with mode: 0644] blob
arch/c6x/platforms/plldata.c [new file with mode: 0644] blob
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