ARM: mvebu: add workaround for SMP support for Armada 375 stepping Z1
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 14 Apr 2014 13:54:06 +0000 (15:54 +0200)
committerJason Cooper <jason@lakedaemon.net>
Thu, 8 May 2014 16:08:30 +0000 (16:08 +0000)
commit87384cc0b4bffbe26d9172d49d8b287332e9d397
treef7ec16c6826131eea6bfd8016895dfec80860c61
parent1ee89e2231a1b04dc34765edd195725ddf4ba998
ARM: mvebu: add workaround for SMP support for Armada 375 stepping Z1

Due to internal bootrom issue, CPU[1] initial jump code (four
instructions) should be placed in SRAM memory of the SoC. In order to
achieve this, we have to unmap the BootROM and at some specific
location where the BootROM was place, create a specific MBus window
for the SRAM. This SRAM is initialized with a few instructions of code
that allows to jump into the real secondary CPU boot address.

This workaround will most likely be disabled when newer steppings of
the Armada 375 will be made available, in which case a dynamic test
based on mvebu-soc-id will be added.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483648-26611-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483648-26611-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/mach-mvebu/headsmp-a9.S
arch/arm/mach-mvebu/platsmp-a9.c