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powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled
authorTimur Tabi <timur@freescale.com>
Mon, 23 Jul 2012 20:43:32 +0000 (15:43 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 26 Jul 2012 18:26:05 +0000 (13:26 -0500)
commit896c01cb4bb3cfc2c0ea9873fa7a9f8bd0a7c8d8
tree8be5534f24ac4b930b1b0b3b43d5ccbf72aa4fc4tree | snapshot
parent6269f2584a359766f53005c676daff8aee60cbedcommit | diff
powerpc/85xx: p1022ds: fix DIU/LBC switching with NAND enabled

In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead.  Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/platforms/85xx/p1022_ds.c diff | blob | history
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