Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor...
authorCraig Topper <craig.topper@gmail.com>
Thu, 13 Oct 2011 07:09:14 +0000 (07:09 +0000)
committerCraig Topper <craig.topper@gmail.com>
Thu, 13 Oct 2011 07:09:14 +0000 (07:09 +0000)
commit8ab1d1e900a5346db019b6a038e3f497bcfb506e
tree638eab0ff5745fe3475e483480474281d4176eca
parentd501c714cdfc34d91c35732b6f0151e19784be56
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141854 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86.td
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrInfo.td
lib/Target/X86/X86Subtarget.h
test/CodeGen/X86/bmi.ll [new file with mode: 0644]
test/MC/Disassembler/X86/simple-tests.txt
test/MC/Disassembler/X86/x86-32.txt