[ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsic
authorJames Molloy <james.molloy@arm.com>
Tue, 11 Aug 2015 12:06:25 +0000 (12:06 +0000)
committerJames Molloy <james.molloy@arm.com>
Tue, 11 Aug 2015 12:06:25 +0000 (12:06 +0000)
commit8b081412aa734ce4b02cb9a84754f715a519dca2
tree11db5a28eee2a40899493a6140dd82bfd354a42f
parentaed86035a57d2bea35a983da3595bab9b325b455
[ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsic

Lower the intrinsic to a FMINNUM/FMAXNUM node and select that instead. This is important because soon SDAG will be able to select FMINNUM/FMAXNUM itself, so we need an integrated lowering path between SDAG and intrinsics.

NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244592 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrNEON.td