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(parent: ad62e92) | patch
Add readcyclecounter lowering on PPC64.
authorHal Finkel <hfinkel@anl.gov>
Sat, 4 Aug 2012 14:10:46 +0000 (14:10 +0000)
committerHal Finkel <hfinkel@anl.gov>
Sat, 4 Aug 2012 14:10:46 +0000 (14:10 +0000)
commit8cc3474f72388836fa4ca7d3622289fb9ee08b41
treeff2efb5d8b676af7332ad5a3df07759354943f3ftree | snapshot
parentad62e92279bc0b14c54db94dd794082c8b8edd9ecommit | diff
Add readcyclecounter lowering on PPC64.

On PPC64, this can be done with a simple TableGen pattern.
To enable this, I've added the (otherwise missing) readcyclecounter
SDNode definition to TargetSelectionDAG.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161302 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetSelectionDAG.td diff | blob | history
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCInstr64Bit.td diff | blob | history
test/CodeGen/PowerPC/ppc64-cyclecounter.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors