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clk: rockchip: rk3399: Modify dummy clock for VOP dclks
authorXing Zheng <zhengxing@rock-chips.com>
Thu, 7 Apr 2016 05:39:08 +0000 (13:39 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Wed, 13 Apr 2016 07:29:10 +0000 (15:29 +0800)
commit8d01ea2168124be2d9225c07d1812b149c1e24e4
tree51466e3b9881a954996a989b9bdaad984f20a527tree | snapshot
parent46265c1e20cc42540ba242b8de9ce64dc113f2a8commit | diff
clk: rockchip: rk3399: Modify dummy clock for VOP dclks

Because frac div need to more than 20 multiple between the numerator
and denominator, but we need to be fit many HDMI/DP freqs and may
bring serious jitter when the dclk_vopx below the dclk_vopx_frac.

Therefore, we can select dclk_vopx below the dclk_vopx_div directly.

Change-Id: If3d9051211f0b160a507f0942667796f043f4ec2
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
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