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(parent: 86ad7b7) | patch
[X86] Add ISel patterns to improve the selection of TZCNT and LZCNT.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Mon, 19 May 2014 20:38:59 +0000 (20:38 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Mon, 19 May 2014 20:38:59 +0000 (20:38 +0000)
commit8e4a223f7bb3ee0ae6a0888b8e670a6bd4983a0a
tree629d5a730a36b7a4fafafba32d37a8c012b8ff8btree | snapshot
parent86ad7b70cb994a9ebde84053026e560a37061ce9commit | diff
[X86] Add ISel patterns to improve the selection of TZCNT and LZCNT.

Instructions TZCNT (requires BMI1) and LZCNT (requires LZCNT), always
provide the operand size as output if the input operand is zero.

We can take advantage of this knowledge during instruction selection
stage in order to simplify a few corner case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209159 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.td diff | blob | history
test/CodeGen/X86/lzcnt-tzcnt.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors