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(parent: 3f1ec42) | patch
RegAllocGreedy: Allow target to specify register class ordering.
authorMatthias Braun <matze@braunis.de>
Tue, 31 Mar 2015 19:57:53 +0000 (19:57 +0000)
committerMatthias Braun <matze@braunis.de>
Tue, 31 Mar 2015 19:57:53 +0000 (19:57 +0000)
commit8e4eaabdb82c99ffe72b2a4ed5322f3a22944606
treed34cb059df625d58515d547e530cc4d564857884tree | snapshot
parent3f1ec42ec73d61eceddfca6071695431b50b78edcommit | diff
RegAllocGreedy: Allow target to specify register class ordering.

Specify an allocation order with a register class. This is used by register
allocators with a greedy heuristic. This is usefull as it is sometimes
beneficial to color more constrained classes first.

Differential Revision: http://reviews.llvm.org/D8626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233743 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/Target.td diff | blob | history
include/llvm/Target/TargetRegisterInfo.h diff | blob | history
lib/CodeGen/RegAllocGreedy.cpp diff | blob | history
utils/TableGen/CodeGenRegisters.cpp diff | blob | history
utils/TableGen/CodeGenRegisters.h diff | blob | history
utils/TableGen/RegisterInfoEmitter.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors