Pool-allocation for MachineInstrs, MachineBasicBlocks, and
authorDan Gohman <gohman@apple.com>
Mon, 7 Jul 2008 23:14:23 +0000 (23:14 +0000)
committerDan Gohman <gohman@apple.com>
Mon, 7 Jul 2008 23:14:23 +0000 (23:14 +0000)
commit8e5f2c6f65841542e2a7092553fe42a00048e4c7
tree24fe54b796f3f450ba6aff12b7357068ca66e341
parent0e5f1306b059b62d7725f324e087efbc8e7a782d
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
37 files changed:
include/llvm/CodeGen/BreakCriticalMachineEdge.h
include/llvm/CodeGen/MachineBasicBlock.h
include/llvm/CodeGen/MachineFunction.h
include/llvm/CodeGen/MachineInstr.h
include/llvm/CodeGen/MachineInstrBuilder.h
lib/CodeGen/BranchFolding.cpp
lib/CodeGen/IfConversion.cpp
lib/CodeGen/LiveIntervalAnalysis.cpp
lib/CodeGen/MachineBasicBlock.cpp
lib/CodeGen/MachineFunction.cpp
lib/CodeGen/MachineInstr.cpp
lib/CodeGen/PHIElimination.cpp
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
lib/CodeGen/TargetInstrInfoImpl.cpp
lib/CodeGen/VirtRegMap.cpp
lib/Target/ARM/ARMConstantIslandPass.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMInstrInfo.cpp
lib/Target/Alpha/AlphaISelLowering.cpp
lib/Target/Alpha/AlphaInstrInfo.cpp
lib/Target/Alpha/AlphaRegisterInfo.cpp
lib/Target/CellSPU/SPUInstrInfo.cpp
lib/Target/IA64/IA64InstrInfo.cpp
lib/Target/IA64/IA64RegisterInfo.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsInstrInfo.cpp
lib/Target/PIC16/PIC16RegisterInfo.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCInstrInfo.h
lib/Target/Sparc/SparcISelLowering.cpp
lib/Target/Sparc/SparcInstrInfo.cpp
lib/Target/X86/X86FloatingPoint.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86InstrInfo.h
lib/Target/X86/X86RegisterInfo.cpp