rk3036: Add pll slow mode, clock gating
authorwdc <wdc@rock-chips.com>
Thu, 28 Aug 2014 07:51:20 +0000 (15:51 +0800)
committerwdc <wdc@rock-chips.com>
Thu, 28 Aug 2014 07:53:19 +0000 (15:53 +0800)
commit91a2fadf7a90096501b30bc260e424d35919ec6f
tree6185f1768a13bbd5a6336176143608c1c8ed459f
parent8dd630910ba90cdc9dab63880bb895071166729b
rk3036: Add pll slow mode, clock gating
Signed-off-by: wdc <wdc@rock-chips.com>
arch/arm/boot/dts/rk3036-clocks.dtsi
arch/arm/boot/dts/rk3036-sdk.dts
arch/arm/boot/dts/rk3036.dtsi
arch/arm/mach-rockchip/rk3036.c
include/linux/rockchip/cru.h