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clk: rockchip: rk3399: To prevent the dclk_vopx below the FRAC clock
authorXing Zheng <zhengxing@rock-chips.com>
Mon, 9 May 2016 01:29:32 +0000 (09:29 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Tue, 10 May 2016 11:13:12 +0000 (19:13 +0800)
commit92cfd751b4a5ea978caa3fd441b4ccf1f3beea0c
tree60239dd45c5d7e597f8cc8fc7fccb5875bdaddf1tree | snapshot
parentbdba697e30d1fae3fdba20c41c2da0ea48fc281ccommit | diff
clk: rockchip: rk3399: To prevent the dclk_vopx below the FRAC clock

In most case, we use the VPLL directly for HDMI or DP, and the
the frac dclk will bring the big jitter for dclk. So we don't need
to use the dclk_vopx_frac.

Change-Id: I0d27e5fcb8b4c9a28c0102074c1d6da9426386f4
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
drivers/clk/rockchip/clk-rk3399.c diff | blob | history
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