mei: expose hardware power gating state to mei layer
authorTomas Winkler <tomas.winkler@intel.com>
Tue, 18 Mar 2014 20:51:59 +0000 (22:51 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 3 May 2014 23:20:24 +0000 (19:20 -0400)
commit964a2331e9a207fc15ef9eef833212347498bea1
tree1c444ed7f440d280c84140ec7e142c7713bb7896
parentee7e5afd2c369b64ffcf419d38ce7ad1c709a53e
mei: expose hardware power gating state to mei layer

Since the runtime pm and the internal power gating
cannot be in complete sync in regards to I/O
operations, we need to expose the device
hardware internal power gating state to mei layer

2. We add pg_state handler that translate the hw
internal pg state to mei layer

2. We add power gating event variable to keep
power track of power gating transitions

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Reviewed-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/mei/hw-me.c
drivers/misc/mei/hw-txe.c
drivers/misc/mei/hw-txe.h
drivers/misc/mei/init.c
drivers/misc/mei/mei_dev.h