UPSTREAM: PCI: rockchip: improve the deassert sequence of four reset pins

UPSTREAM: PCI: rockchip: improve the deassert sequence of four reset pins

Per TRM, we need to deassert the four reset pins simultaneously.
Currently the reset framework doesn't support that so we did it
one by one. It seems no side effect found but it does impact the
state machine of controller, so sometimes the change speed bit is
not setted when sending training sequence from recover state.
After the silicon RTL review from Soc guys, we don't need to do
the sequence recommended by TRM, and could just move the deassert
of mgmt_sticky_rst to the first place.

Change-Id: I001f3707054af98b147cb1d56b1a03e5f7d44ceb
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 58c6990c5ee772c2551193f053e51a52b9984b49)