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MIR Serialization: Serialize physical register machine operands.
authorAlex Lorenz <arphaman@gmail.com>
Tue, 23 Jun 2015 16:35:26 +0000 (16:35 +0000)
committerAlex Lorenz <arphaman@gmail.com>
Tue, 23 Jun 2015 16:35:26 +0000 (16:35 +0000)
commit9982d6f7ee6299967b460b798b2220c7a463955b
tree5c461ab7b07cf7bb1682b63e1394a746e5fd7cd1tree | snapshot
parenta99d1c85a8c99a64b6d9d3002f1ba37e79d51b11commit | diff
MIR Serialization: Serialize physical register machine operands.

This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240425 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/MIRParser/MILexer.cpp diff | blob | history
lib/CodeGen/MIRParser/MILexer.h diff | blob | history
lib/CodeGen/MIRParser/MIParser.cpp diff | blob | history
lib/CodeGen/MIRPrinter.cpp diff | blob | history
test/CodeGen/MIR/X86/expected-machine-operand.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/missing-comma.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/named-registers.mir [new file with mode: 0644] blob
test/CodeGen/MIR/X86/unknown-register.mir [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors