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(parent: b6a6388) | patch
Add pass that expands pseudo instructions into target instructions after register...
authorAkira Hatanaka <ahatanak@gmail.com>
Fri, 15 Apr 2011 19:52:08 +0000 (19:52 +0000)
committerAkira Hatanaka <ahatanak@gmail.com>
Fri, 15 Apr 2011 19:52:08 +0000 (19:52 +0000)
commit99a2e98eddf00c4afd3817564cb8c914a6f66ae9
treee8a278000fc29086534d63dc2e15a3af6217841ftree | snapshot
parentb6a638898a92d5cd782209fbeb673fe7846a29ebcommit | diff
Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Mips.h diff | blob | history
lib/Target/Mips/MipsExpandPseudo.cpp [new file with mode: 0644] blob
lib/Target/Mips/MipsISelLowering.cpp diff | blob | history
lib/Target/Mips/MipsISelLowering.h diff | blob | history
lib/Target/Mips/MipsInstrFPU.td diff | blob | history
lib/Target/Mips/MipsTargetMachine.cpp diff | blob | history
lib/Target/Mips/MipsTargetMachine.h diff | blob | history
test/CodeGen/Mips/buildpairextractelementf64.ll [new file with mode: 0644] blob
test/CodeGen/Mips/o32_cc_vararg.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors