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(parent: a86a586) | patch
The Mips specific function for instruction cache invalidation cannot be
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Mon, 10 Oct 2011 18:41:02 +0000 (18:41 +0000)
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Mon, 10 Oct 2011 18:41:02 +0000 (18:41 +0000)
commit9d2fa87816359ea615a31680c93e76b0dddbad17
tree432c141a967b76728c765e3522952d751ba9e539tree | snapshot
parenta86a58695dfbfa1b0e660f09297e6608e3a48bbccommit | diff
The Mips specific function for instruction cache invalidation cannot be
compiled on mips32r1 processors because it uses synci and rdhwr instructions
which are supported only on mips32r2, so I replaced this function with the
call to function cacheflush which works for both mips32r1 and mips32r2.
Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141564 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Support/Memory.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors