[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5
authorOliver Stannard <oliver.stannard@arm.com>
Wed, 1 Oct 2014 13:13:18 +0000 (13:13 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Wed, 1 Oct 2014 13:13:18 +0000 (13:13 +0000)
commit9d7038c437bb9e2c4dd148088172fab23cac295d
tree4a4d76913fc8f94c186b750c2b962c6aad1a78e7
parent7d64681274c0e8d922729c67dfca01c0f4922672
[ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5

Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions
when targeting ARMv8, but they are actually present on any target with
FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an
M-profile core, but they have the same instructions so we model them
both as FPARMv8 in the ARM backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218763 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/ARM/arm32-rounding.ll
test/CodeGen/Thumb2/float-intrinsics-double.ll
test/CodeGen/Thumb2/float-intrinsics-float.ll