X86: Match for X86ISD nodes in LowerBUILD_VECTOR instead of BUILD_VECTORCombine
authorMatthias Braun <matze@braunis.de>
Tue, 21 Apr 2015 17:21:36 +0000 (17:21 +0000)
committerMatthias Braun <matze@braunis.de>
Tue, 21 Apr 2015 17:21:36 +0000 (17:21 +0000)
commit9e0a1565b9fb2cee34cd82ea33fc29261801a414
treec0e07eecad8381d8b6aa738c9fcb5a48771cd88c
parent0aa62dd53af549aaa84452ddd979c97c822973e8
X86: Match for X86ISD nodes in LowerBUILD_VECTOR instead of BUILD_VECTORCombine

There doesn't seem to be a reason to perform this target ISD node matching
in an DAGCombine, moving it to lowering fixes PR23296.

Differential Revision: http://reviews.llvm.org/D9137

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235394 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/haddsub.ll