UPSTREAM: clk: rockchip: only enter pll slow-mode directly before reboots on rk3288

UPSTREAM: clk: rockchip: only enter pll slow-mode directly before reboots on rk3288

As commit 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.

The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.

Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.

This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.

For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.

With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.

Fixes: 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
(cherry picked from commit dfff24bde7fb8d57482e907d5dfb0be3a9e28119)

Conflicts:

	drivers/clk/rockchip/clk-rk3228.c
[zx: there is no rk3228 clock controller, apply for clk-rk3366]

Change-Id: I2e91afd893c87eb3ab8a41db1fe81f5c43409951
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>