drm/i915: Properly sort MI coomand table
authorHanno Böck <hanno@hboeck.de>
Wed, 29 Jul 2015 08:29:58 +0000 (10:29 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 29 Jul 2015 08:29:58 +0000 (10:29 +0200)
commit9f58582c7ad64f025e7fc582461c5bfafb46818f
tree6d6a79f8f6b1fcb5d3e161816dc7814b872f9359
parentdcc13bcb488874568c5e2c32b43b68e069ada75c
drm/i915: Properly sort MI coomand table

In the future, we may want to speed up command/register searching using
a bisection and so we require them to be in ascending order respectively
by command value or register address. However, this was not true for one
pair in the MI table; make it so.

Signed-off-by: Hanno Boeck <hanno@hboeck.de>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Hand-assemble patch from raw patch from Hanno and commit message from Chris.]
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
drivers/gpu/drm/i915/i915_cmd_parser.c